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Chip Performance Profiling Engineer - Member of Technical Staff

Location: San Francisco, CA, USA
Compensation:

USD 175k-275k / year

Posted:
3 days

System Verification Co-Design Engineer - Speed and Rel

Location: Santa Clara, CA, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
19 days
Mid-Senior Level

Senior System Integration and Validation Engineer

Location: Bengaluru, Karnataka, India
Posted:
1 month
Senior

System Speed and Reliability Co-Design Engineer

Location: Santa Clara, CA, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
2 months
Mid-Senior Level

Lead Post-Silicon Validation Engineer

Location: Santa Clara, CA, USA
Compensation:

USD 200k-379,500 / year + Equity

Posted:
2 months
Senior

Distinguished Engineer, Power Architecture

Location: Santa Clara, CA, USA
Compensation:

USD 320k-488,750 / year + Equity

Posted:
2 months
CXO

Senior Silicon Product Engineer, DFP - Manufacturing

Location: Santa Clara, CA, USA
Compensation:

USD 168k-310,500 / year + Equity

Posted:
4 months
Senior

Senior Technical Program Manager - VLSI

Location: Santa Clara, CA, USA
Compensation:

USD 168k-322k / year + Equity

Posted:
5 months
Senior