On-site & Remote

Showing 104 jobs

Senior Chip Design Dynamic Verification Engineer

Location: Tel Aviv-Yafo, Israel
Posted:
11 days
Senior

Senior Design Verification Engineer - Interconnect IP

Location: Shanghai, China
Posted:
17 days
Senior

Senior IP Design Verification Engineer - XBAR IP

Location: Bengaluru, Karnataka, India
Posted:
17 days
Senior

Senior Chip Design Engineer

Location: Tel Aviv-Yafo, Israel
Posted:
21 days
Senior

Senior Chip Design and Verification Engineer

Location: Tel Aviv-Yafo, Israel
Posted:
23 days
Senior

Senior ASIC Design Engineer - Clocks IP

Location: Austin, TX, USA; Santa Clara, CA, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
21 days
Senior

Senior Chip Design Engineer

Location: Tel Aviv-Yafo, Israel
Posted:
1 month
Senior

Senior Chip Design Verification Engineer

Location: Be'er Sheva, Israel
Posted:
1 month
Senior

Senior DevOps Software Engineer - Chip Design

Location: Tel Aviv-Yafo, Israel; Yokne'am Illit, Israel
Posted:
1 month
Senior

Senior ASIC Power Management Micro Architect, Chip Design

Location: Tel Aviv-Yafo, Israel; Yokne'am Illit, Israel
Posted:
3 days
Senior

Senior STA Signoff Methodology Engineer

Location: Austin, TX, USA; Santa Clara, CA, USA
Compensation:

USD 168k-310,500 / year + Equity

Posted:
3 days
Senior

Custom SOC IP Verification Engineer

Location: Austin, TX, USA; Santa Clara, CA, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
3 days
Senior

Senior Architect, IC-System

Location: Tel Aviv-Yafo, Israel
Posted:
5 days
Senior

Senior Platform Engineer, Design Automation

Location: Santa Clara, CA, USA
Compensation:

USD 196k-368k / year + Equity

Posted:
5 days
Senior

CPU Design Methodology Engineer

Location: Austin, TX, USA; Arizona, USA; Santa Clara, CA, USA; Hillsboro, OR, USA; Remote
Compensation:

USD 168k-310,500 / year + Equity

Posted:
5 days
Senior

Senior ASIC Engineer, Infra and Workflow - Networking Chip Design

Location: Shanghai, China
Posted:
1 month
Senior

Senior ASIC Verification Engineer - Networking Chip Design

Location: Shanghai, China
Posted:
1 month
Senior

Senior Packaging Technical Engineer - Hardware

Location: Hsinchu City, Taiwan 300
Posted:
9 days
Senior

Senior System Integration Engineer, Memory

Location: United States; California, USA; Texas, USA; Washington, USA; Santa Clara, CA, USA; Idaho, USA; Remote
Compensation:

USD 196k-310,500 / year + Equity

Posted:
17 days
Senior

Senior Package Layout Engineer - Hardware

Location: United States; California, USA; Oregon, USA; Washington, USA; Arizona, USA; Nevada, USA; Santa Clara, CA, USA; Remote
Compensation:

USD 136k-258,750 / year + Equity

Posted:
17 days
Senior