On-site & Remote

Showing 26 jobs

Design Engineer, Coherent High Speed Interconnect

Location: Hsinchu City, Taiwan 300; Taipei City, Taiwan
Posted:
4 days
Senior

Senior Chip Design Engineer

Location: Tel Aviv-Yafo, Israel
Posted:
22 days
Senior

Senior Digital Design Engineer

Location: Austin, TX, USA; Redmond, WA, USA; Santa Clara, CA, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
22 days
Senior

Senior DFX Power Methodology Engineer

Location: Santa Clara, CA, USA
Compensation:

USD 196k-368k / year + Equity

Posted:
23 days
Senior

Senior Chip Design Engineer

Location: Tel Aviv-Yafo, Israel
Posted:
1 month
Senior

Senior Verification Engineer

Location: Sydney, NSW, Australia
Posted:
1 month
Senior

ASIC Design Engineer, Clocks

Location: Shanghai, China
Posted:
1 month
Senior

Staff System Software Engineer, RTL-to-GDS Flow Platform

Location: Santa Clara, CA, USA
Compensation:

USD 184k-356,500 / year + Equity

Posted:
1 month
Senior

System Software Engineer, Engineering Workflow Platform

Location: Santa Clara, CA, USA
Compensation:

USD 152k-287,500 / year + Equity

Posted:
1 month
Mid-Senior Level

Senior Digital Engineer

Location: Sydney, NSW, Australia
Posted:
1 month
Senior

Senior SOC Design Engineer

Location: Bengaluru, Karnataka, India
Posted:
1 month
Senior

Senior RTL Integration Engineer

Location: Be'er Sheva, Israel; Tel Aviv-Yafo, Israel; Yokne'am Illit, Israel
Posted:
1 month
Senior

Senior Packaging Technical Engineer - Hardware

Location: Bengaluru, Karnataka, India
Posted:
2 months
Senior

Senior Design Engineer, Coherent High Speed Interconnect

Location: Santa Clara, CA, USA
Compensation:

USD 168k-310,500 / year + Equity

Posted:
2 months
Senior

Senior Design Engineer, Coherent High Speed Interconnect

Location: Santa Clara, CA, USA
Compensation:

USD 168k-310,500 / year + Equity

Posted:
3 months
Senior

Senior ASIC Infrastructure Engineer

Location: Toronto, ON, Canada
Compensation:

CAD 135k-220k / year + Equity

Posted:
3 months
Senior

Senior Logic Design Engineer, Cache Coherent Interconnects

Location: Santa Clara, CA, USA; Hillsboro, OR, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
3 months
Senior

Senior Chip Design Hardware Emulation Engineer

Location: Tel Aviv-Yafo, Israel; Yokne'am Illit, Israel
Posted:
5 months
Senior

ASIC Hardware Design Engineer - New College Grad 2026

Location: Austin, TX, USA
Compensation:

USD 116k-218,500 / year + Equity

Posted:
5 months
Internship

Senior Power Analysis and Optimization Engineer

Location: Austin, TX, USA; Santa Clara, CA, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
5 months
Senior