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Showing 189 jobs

Senior Full-stack Software Engineer - Verification Data and Visualization Platform

Location: Westford, MA, USA; Santa Clara, CA, USA; Durham, NC, USA
Compensation:

USD 152k-287,500 / year + Equity

Posted:
2 days
Senior

Senior Mixed Signal Design Verification Engineer

Location: Hsinchu City, Taiwan 300; Taipei City, Taiwan
Posted:
2 days
Senior

Senior PCIe Design Verification Engineer

Location: Hsinchu City, Taiwan 300; Taipei City, Taiwan
Posted:
2 days
Senior

Senior Custom SOC IP Verification Engineer

Location: Shanghai, China
Posted:
5 days
Senior

Senior Full Chip Layout and Physical Verification CAD Engineer

Location: Tel Aviv-Yafo, Israel; Yokne'am Illit, Israel
Posted:
10 days
Senior

Senior Formal Verification Engineer

Location: Santa Clara, CA, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
11 days
Senior

Senior Verification Engineer - Hardware

Location: Santa Clara, CA, USA
Compensation:

USD 168k-310,500 / year + Equity

Posted:
12 days
Senior

Senior Verification Engineer

Location: Bengaluru, Karnataka, India
Posted:
12 days

Senior DFT Verification Engineer

Location: Bengaluru, Karnataka, India
Posted:
19 days
Senior

Senior IP Design Verification Engineer - XBAR IP

Location: Bengaluru, Karnataka, India
Posted:
19 days
Senior

Senior SOC Verification Engineer - Networking

Location: Bengaluru, Karnataka, India
Posted:
23 days
Mid-Senior Level

Senior Chip Design Verification Engineer, Port IP Group

Location: Tel Aviv-Yafo, Israel
Posted:
25 days
Senior

Senior Verification Engineer

Location: Sydney, NSW, Australia
Posted:
1 month
Senior

Senior Memory Controller Verification Engineer

Location: Austin, TX, USA; Westford, MA, USA; Santa Clara, CA, USA; Hillsboro, OR, USA; Seattle, WA, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
1 month
Senior

Senior ASIC Design Verification Engineer

Location: Santa Clara, CA, USA
Compensation:

USD 136k-218,500 / year + Equity

Posted:
1 month
Senior

Deep Learning Applications Engineer

Location: Seoul, South Korea
Posted:
1 day
Mid-Senior Level

Senior Mask Layout Design Engineer

Location: Hsinchu City, Taiwan 300; Taipei City, Taiwan
Posted:
2 days
Senior

Senior Mixed Signal Design Engineer

Location: Hsinchu City, Taiwan 300; Taipei City, Taiwan
Posted:
2 days
Senior

PCIe IP Verification Engineer

Location: Bengaluru, Karnataka, India
Posted:
2 days
Mid-Senior Level

Senior Chip Design Verification Engineer

Location: Be'er Sheva, Israel; Tel Aviv-Yafo, Israel
Posted:
1 month
Senior